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RVY libunwind patches. - #832

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jrtc27 merged 3 commits into
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libunwind-rvy
Oct 23, 2026
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jrtc27 merged 3 commits into
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libunwind-rvy

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@qwattash

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These enable c18n on RVY.

Stop treating the trusted stack pointer as a register because it is
unnecessary and some architectures like RISC-V do not in fact store it
in a dedicated register.

Co-authored-by: Dapeng Gao <dapeng.gao@cl.cam.ac.uk>
@qwattash
qwattash requested review from dpgao and jrtc27 October 15, 2026 17:02
Comment thread libunwind/src/CompartmentInfo.hpp Outdated
CHERI_DBG("C18N: SET IP: %#p\n", state.pc);

#ifdef _LIBUNWIND_TARGET_AARCH64
static constexpr int callee_saved[] = {

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LLVM style is lowerCamelCase. Also ideally this would be split into one commit that pulls out calleeSaved and then another that ifdefs to add a RISC-V one.

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:( did not double check for this, will fix.

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still needs a clang-format pass

.macro restore_fpr num, ctxreg
#ifdef __CHERI_PURE_CAPABILITY__
fld f\num, (RISCV_FOFFSET + RISCV_FSIZE * \num)(c\ctxreg)
fld f\num, (RISCV_FOFFSET + RISCV_FSIZE * \num)(\ctxreg)

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Please split the RVY-compatible mnemonic changes out from the c18n changes

@jrtc27 jrtc27 Oct 15, 2026 •

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Also at this point the ifdef isn't needed? Nor are the GPR ones needed, so long as ILOAD/ISTORE/RISCV_ISIZE are appropriately renamed to not be I for Integer, and defined to be LY/SY/__SIZEOF_CHERI_CAPABILITY__ CHERI?

Edit: Meant to include this in the original review but it was left pending... so will just do this myself :)

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Should be fixed now.

@qwattash
qwattash force-pushed the libunwind-rvy branch 2 times, most recently from bfa2298 to 6aa420d Compare October 15, 2026 21:33

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All good except some indentation issues.

Comment thread libunwind/include/__libunwind_config.h Resolved
Comment thread libunwind/src/assembly.h Resolved
Comment thread libunwind/src/Registers.hpp Resolved
Co-authored-by: Dapeng Gao <dapeng.gao@cl.cam.ac.uk>

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Thanks. I will follow up with some simplification of the (save|restore)_[gf]pr macros.

.macro restore_fpr num, ctxreg
#ifdef __CHERI_PURE_CAPABILITY__
fld f\num, (RISCV_FOFFSET + RISCV_FSIZE * \num)(c\ctxreg)
fld f\num, (RISCV_FOFFSET + RISCV_FSIZE * \num)(\ctxreg)

@jrtc27 jrtc27 Oct 15, 2026 •

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Also at this point the ifdef isn't needed? Nor are the GPR ones needed, so long as ILOAD/ISTORE/RISCV_ISIZE are appropriately renamed to not be I for Integer, and defined to be LY/SY/__SIZEOF_CHERI_CAPABILITY__ CHERI?

Edit: Meant to include this in the original review but it was left pending... so will just do this myself :)

@jrtc27
jrtc27 merged commit 8263f5c into dev Oct 23, 2026
5 of 6 checks passed
@jrtc27
jrtc27 deleted the libunwind-rvy branch October 23, 2026 13:05
@jrtc27

jrtc27 commented Oct 23, 2026

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Thanks. I will follow up with some simplification of the (save|restore)_[gf]pr macros.

16abc1d, for posterity

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3 participants